I'm working on totally pointless projects right now.
It's fucking great.
So today I built a little imaginary computer with 16 registers, 256 addressable rom and memory addresses and status flags. The cpu understands 16 op codes.
@neauoire the constraints are pretty similar to Wirth's CPU for the Oberon project.
https://people.inf.ethz.ch/wirth/FPGA-relatedWork/RISC-Arch.pdf
It's actually specified in an HDL:
https://issuu.com/xcelljournal/docs/xcell_journal_issue_91/30
You could at one point exchange cash for hardware:
https://web.archive.org/web/20160304095413/http://oberonstation.x10.mx/
Granted, Wirth's design allows for 1MB RAM for running a graphical, #plan9-like OS on a monochrome 1024×768 display:
https://github.com/pdewacht/oberon-risc-emu/blob/master/po2013.png
The entire thing (kernel, GC, GUI, compiler, and HDL design fits in a few tens of thousands lines of code.
A CPU simulator for Wirth's RISC design implemented in <80 lines of code:
https://people.inf.ethz.ch/wirth/ProjectOberon/Sources/RISC.Mod.txt
More verbosely, in C:
The system is small, but definitely not toy-class. There are real practical considerations that went into its design.
@colby Oberon is great :) I've messed with the emulator a lot a few months back.
@neauoire it's actually so "plan9-like" because it's what influenced Rob Pike and Russ Cox's design decisions. acme's mouse-driven shell was directly inspired by Oberon's UI. Oberon-the-system and Oberon-the-language have their influence all over plan9 and golang.